Substrate for mounting chip and chip package
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United States of America Patent
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Jun 6, 2017
Grant Date -
Jul 21, 2016
app pub date -
Sep 17, 2014
filing date -
Sep 17, 2013
priority date (Note) -
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status (Latency Note)
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Abstract
A chip mounting substrate including a plurality of conductive portions to apply an electrode voltage to a mounted chip having electrode portions, at least one insulation portion configured to electrically isolate conductive portions, a cavity depressed inward of the conductive portions and providing a space in which the chip is mounted and bumps formed on surfaces of the conductive portions having the cavity and bonded to the electrode portions. In the case of a metal substrate, a tight bonding is enabled between the chip and the substrate by bonding a plating layer formed on the electrode portions of the chip using bumps formed on the metal substrate.
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