Semiconductor device
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United States of America Patent
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May 30, 2017
Grant Date -
Jul 21, 2016
app pub date -
Jan 5, 2016
filing date -
Jan 16, 2015
priority date (Note) -
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Abstract
One embodiment provides a semiconductor device having a first chip for lowering an input voltage and a second chip for performing signal processing, mounted on a die pad. Lead terminals are divided into a first lead row and a second lead row. The first lead row are connected with the first chip, the first chip are connected with the second chip or the second lead row, and the second chip are connected with the second lead row. A distance between the lead terminals of the first lead row is set longer than a distance between the lead terminals of the second lead row, and a sealing resin is provided to fill at least between the lead terminals of the first lead row.
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