Methods of fabricating QFN semiconductor package and metal plate

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United States of America Patent

PATENT NO 9659842
SERIAL NO

14863436

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Abstract

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A method for fabricating a quad flat non-leaded (QFN) package includes: forming die pads and bump solder pads by pressing a metal plate, wherein each of the die pads and the bump solder pads has at least a cross-sectional area greater than another cross-sectional area located underneath along its vertical thickness dimension, thereby enabling the die pads and the solder pads to be securely embedded in an encapsulant.

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Patent Owner(s)

Patent OwnerAddress
APTOS TECHNOLOGY INCNO 65 KUANG-FU NORTH RD HSIN-CHU INDUSTRIAL PARK HU-KOU HSIN-CHU 303 303

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Jow, En-min Taipei, TW 34 239

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