Multi-bank memory device and system

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United States of America Patent

PATENT NO 9653148
SERIAL NO

15047605

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Abstract

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A memory device includes a common data bus, a plurality of memory banks and a control circuit. The memory banks are coupled to the common data bus. The memory banks share the common data bus. Each of the memory banks includes a storage device and a data register. The data register is coupled between the storage device the common data bus, and is arranged for storing data read from the storage device. The control circuit is coupled to storage devices and data registers of the memory banks, and is arranged for referring to an address signal and an access signal to control the storage device of said each memory bank to output the data to the corresponding data register, and referring to the address signal and a programmable latency time to control the data registers to output data from the memory banks to the common data bus.

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Patent Owner(s)

Patent OwnerAddress
PIECEMAKERS TECHNOLOGY INC9F-1 NO 89 DONGMEI RD EAST DIST HSINCHU CITY

International Classification(s)

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Ting, Tah-Kang Joseph Taipei, TW 35 209
Wang, Gyh-Bin Hsinchu County, TW 24 196
Wang, Ming-Hung Hsinchu, TW 31 578

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