ASYMMETRICAL EMPHASIS IN A MEMORY DATA BUS DRIVER
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United States of America Patent
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May 16, 2017
Grant Date -
Jun 8, 2017
app pub date -
Dec 2, 2015
filing date -
Dec 2, 2015
priority date (Note) -
Granted
status (Latency Note)
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Abstract
An apparatus includes an interface and a circuit. The interface may be configured to generate a memory signal that carries read data from a memory channel. The circuit may be configured to modify a read signal that transfers the read data across a read line to a memory controller. A filter may delay the memory signal to generate a delayed signal. A driver generally amplifies the memory signal to generate the read signal. The driver may modify the read signal with a de-emphasis on each pull up of the memory signal and a pre-emphasis on each pull down of the memory signal based on the delayed signal.
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