Insulated gate bipolar device
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United States of America Patent
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Apr 25, 2017
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N/A
app pub date -
Feb 4, 2016
filing date -
Feb 5, 2015
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Abstract
A semiconductor device includes: metal collector layer on backside, P-type collector layer, N-type field stop layer and N− drift layer. There are active cells and dummy cells on top of the device. The active cell and dummy cell are separated by gate trench. The gate trench is formed by polysilicon and gate oxide layer. There are N+ region and P+ region in active cells, and they are connected to metal emitter layer through the window in the insulation layer. There are P-well regions in both active cells and dummy cells. The P-well regions in active cells are continuous and connected to emitter electrode through P+ region. The P-well regions in dummy cells are discontinuous and electrically floating.
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