Memory device test apparatus and method having multiple memory devices connected to downstream ports of a PCI express switch at the same time
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United States of America Patent
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Apr 18, 2017
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Mar 31, 2016
app pub date -
Mar 18, 2015
filing date -
Sep 30, 2014
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Abstract
Disclosed herein are a method and an apparatus for shortening a data comparison test time by using peer-to-peer transfers between peripheral component interconnect express (PCIe) endpoints when testing solid state drive (SSD) devices. A memory device test apparatus performing a data comparison test of a memory device mounted in a downstream port of a peripheral component interconnect express (PCIe) switch by performing a writing process and a reading-back process by a control of a host central processing unit (CPU) includes: a comparison test unit (FPGA) connected to the downstream port of the PCIe switch, performing peer-to-peer communication with the memory device to supply write data to the memory device and receive read-back data from the memory device, and performing the data comparison test.
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