Memory provided with associated volatile and non-volatile memory cells
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United States of America Patent
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Apr 11, 2017
Grant Date -
Nov 10, 2016
app pub date -
Jan 7, 2015
filing date -
Jan 10, 2014
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Abstract
A memory array including: a plurality of volatile memory cells, each including a latch; and a plurality of non-volatile memory cells, each including at least one resistive element that can be programmed by the direction of a current passed therethrough in order to take at least two resistive states, each of the non-volatile memory cells being associated with a corresponding cell from the volatile memory cells.
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