Single wire system clock signal generation

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United States of America Patent

PATENT NO 9612609
SERIAL NO

14546564

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Abstract

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This specification describes an integrated circuit comprising: a single wire interface; a clock circuit configured to detect a voltage from the single wire interface and to generate a clock signal having a frequency that is based on the detected voltage; and a digital system coupled with the single wire interface and the clock circuit. The digital system is configured to: receive a data signal from the single wire interface; power the digital system using a power signal from the single wire interface; and perform one or more operations clocked by the clock signal.

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Patent Owner(s)

Patent OwnerAddress
ATMEL CORPORATION2355 W CHANDLER BLVD CHANDLER AS 85224

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Weiner, Albert S Colorado Springs, US 16 220

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