Digital phase locked loop arrangement with master clock redundancy
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United States of America Patent
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Mar 14, 2017
Grant Date -
Oct 13, 2016
app pub date -
Mar 9, 2016
filing date -
Apr 8, 2015
priority date (Note) -
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Abstract
Master clock redundancy is provided for a digital phase locked loop having a digital controlled oscillator (DCO) driven by a master clock source, for example, a crystal oscillator. One of a plurality of a crystal oscillators generating clock signals is selected to drive the DCO. The performance of the crystal oscillators is monitored, and the DCO is switched from being driven by a previously selected crystal oscillator to a newly selected crystal oscillator upon loss of a clock signal from the previously selected crystal oscillator or when the performance of the previously selected crystal oscillator falls below a predetermined acceptable level.
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