Method for manufacturing injection-enhanced insulated-gate bipolar transistor

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United States of America Patent

PATENT NO 9583587
APP PUB NO 20160372573A1
SERIAL NO

14902220

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A method for manufacturing an injection-enhanced insulated-gate bipolar transistor, comprising the following steps: an n-type substrate (12) is provided; a p-type doped layer (14) is formed on the n-type substrate (12); a hard layer (20) is formed on the p-type doped layer (14); a groove (40) extending to the n-type substrate (12) is formed by etching on the p-type doped layer (14); an n-type doped layer (50) is formed on the sidewalls and bottom of the groove (40); the hard layer (20) is removed; p-type impurities of the p-type doped layer (14) and n-type impurities of the n-type doped layer (50) are driven in together, where the p-type impurities are diffused to form a p-type base region (60), and the n-type impurities are diffused to form an n-type buffer layer (70); a gated oxide dielectric layer (80) is formed on the surface of the groove (40); and, a polysilicon layer (90) is deposited in the groove having formed therein the gate oxide dielectric layer (80). In the method for manufacturing the injection-enhanced insulated-gate bipolar transistor, the p-type doped layer (14) and the n-type doped layer (50) are driven in together to form the p-type base region (60) and the n-type buffer layer (70), as only one drive-in process is required, production cycle is shortened in comparison with a conventional method for manufacturing the injection-enhanced insulated-gate bipolar transistor.

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Patent Owner(s)

Patent OwnerAddress
CSMC TECHNOLOGIES FAB2 CO LTD214028 NO 8 XINZHOU ROAD NATIONAL HI TECH INDUSTRIAL DEVELOPMENT ZONE WUXI JIANGSU WUXI CITY JIANGSU PROVINCE 214028

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Deng, Xiaoshe Jiangsu, CN 15 19
Huang, Xuan Jiangsu, CN 30 28
Wang, Genyi Jiangsu, CN 16 29
Wang, Wanli Jiangsu, CN 14 5

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