Low density parity-check code decoder and decoding method thereof

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United States of America Patent

PATENT NO 9577672
SERIAL NO

14335327

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Abstract

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The present disclosure illustrates a low density parity-check code decoder adapted for decoding coding data having bit nodes and check nodes. The decoder includes a calculation module and a memory. The calculation module includes k calculation units and n shift units, and the memory includes n memory units. The memory is coupled to the calculation module. Each shift unit is one-to-many coupled to the k calculation units. The n memory units are coupled to the n shift units. The calculation module operatively divides the coding data into n first-bit-strings. The ith calculation unit operatively generates a second-bit-string by calculating ith bits of the n first-bit-strings. The jth shift unit operatively generates a third-bit-string upon receiving jth bits of the k second-bit-strings, and shifts the third-bit-string. The memory units are configured for storing the n shifted third-bit-strings respectively.

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Patent Owner(s)

Patent OwnerAddress
STORART TECHNOLOGY(SHENZHEN) CO LTD1005 BLOCK B FU AN SCIENCE AND TECHNOLOGY BUILDING GAOXIN 1ST ROAD SOUTH YUEHAI SUB-DISTRICT SCIENCE AND TECHNOLOGY PARK SOUTH ZONE NANSHAN DISTRICT SHENZHEN GUANGDONG PROVINCE

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Hung, Jui-Hui Tainan, TW 9 13
Yen, Chih-Nan Hsinchu, TW 15 87

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