Low-dropout voltage regulator
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United States of America Patent
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Feb 21, 2017
Grant Date -
Feb 18, 2016
app pub date -
Jul 20, 2015
filing date -
Aug 14, 2014
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Abstract
The invention is directed to a low-dropout voltage regulator (LDO), including a power transistor, a driving stage circuit, a feedback circuit, a bias power source and an auxiliary reference current generation circuit. The power transistor is controlled by a driving signal to convert an input voltage into an output voltage. The feedback circuit generates a feedback voltage according to the output voltage. The driving stage circuit generates the driving signal according to the feedback voltage and the reference voltage. The bias power source provides a bias current. The auxiliary reference current generation circuit is configured to sample an output current, adjust the sampled output current to generate an adjustment current by means of mapping and superpose the adjustment current onto the bias current to generate a reference current to control drive capability of the driving stage circuit.
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