Transconductance (gm) boosting transistor arrangement

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United States of America Patent

PATENT NO 9571052
SERIAL NO

14336653

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Abstract

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A circuit may increase input transconductance. An input stage may include a field effect transistor (FET) that has a gate, source, drain, and body terminal. An amplifier may generate an amplified version of the input voltage received that is applied to the body terminal of the FET. Application of the amplified version to the body terminal of the FET may increase the transconductance of the FET compared to what it would be in the same circuit without the amplified version being applied to the body terminal of the FET.

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Patent Owner(s)

Patent OwnerAddress
ANALOG DEVICES INTERNATIONAL UNLIMITED COMPANYBAY F1 RAHEEN INDUSTRIAL ESTATE CO LIMERICK LIMERICK

International Classification(s)

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  • 2014 Application Filing Year
  • H03F Class
  • 1020 Applications Filed
  • 951 Patents Issued To-Date
  • 93.24 % Issued To-Date
Click to zoom InYear of Issuance% of Matters IssuedCumulative IssuancesYearly Issuances20142015201620172018201920200255075100

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Trampitsch, Gerd Unterfoehring, DE 11 39

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  • 4 Citation Count
  • H03F Class
  • 13.60 % this patent is cited more than
  • 8 Age
Citation count rangeNumber of patents cited in rangeNumber of patents cited in various citation count ranges914637314186111101 - 1011 - 2021 - 3031 - 4041 - 5051 - 6061 - 7071 - 8091 - 1000255075100125150175200225250275300325350375400425450475500

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