Clock and data recovery circuit with bidirectional frequency detection and electronic device using the same
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United States of America Patent
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Jan 31, 2017
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app pub date -
Nov 27, 2015
filing date -
Nov 27, 2015
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Abstract
A clock and data recovery (CDR) circuit is provided. A phase detection circuit receives an input signal and a clock signal to output a first voltage signal. A first comparing circuit determines whether the first voltage signal is within a voltage range to output a first up signal and a first down signal. A counting circuit updates a counting value according to the input signal and the clock signal. A second comparing circuit determines whether the counting value is within a value range to output a second up signal and a second down signal. A selection circuit outputs a second voltage signal according to the first up signal, the first down signal, the second up signal, and the second down signal. A voltage controlled oscillator outputs the clock signal according to the first voltage signal and the second voltage signal.
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