Integrated circuit with bonding circuits for bonding memory controllers
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United States of America Patent
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Jan 31, 2017
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app pub date -
Jun 20, 2011
filing date -
Jun 20, 2011
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Abstract
An IC that includes a first memory controller, a second memory controller, and a first bonding circuit coupled to the first memory controller, where the first bonding circuit is a hard logic bonding circuit and is operable to coordinate memory control functions of the first memory controller and the second memory controller. In one implementation, the first memory controller is an N bits wide memory controller, the second memory controller is an M bits wide memory controller, and the first bonding circuit is operable to coordinate the memory control functions of the first memory controller and the second memory controller such that the first and second memory controllers together function as an N+M bits wide memory controller, where N and M are positive integers.
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