Apparatus and method for combined micro-scale and nano-scale C-V, Q-V, and I-V testing of semiconductor materials
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United States of America Patent
Stats
-
Jan 24, 2017
Grant Date -
Jun 14, 2012
app pub date -
Feb 16, 2012
filing date -
Jul 18, 2006
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
Current Voltage and Capacitance Voltage (IV and CV) measurements are critical in measurement of properties of electronic materials especially semiconductors. A semiconductor testing device to accomplish IV and CV measurement supports a semiconductor wafer and provides a probe for contacting a surface on the wafer under control of an atomic Force Microscope or similar probing device for positioning the probe to a desired measurement point on the wafer surface. Detection of contact by the probe on the surface is accomplished and test voltage is supplied to the semiconductor wafer. A first circuit for measuring capacitance sensed by the probe based on the test voltage and a complimentary circuit for measuring Fowler Nordheim current sensed by the probe based on the test voltage are employed with the probe allowing the calculation of characteristics of the semiconductor wafer based on the measured capacitance and Fowler Nordheim current.
First Claim
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International Classification(s)
- 2012 Application Filing Year
- G01Q Class
- 88 Applications Filed
- 79 Patents Issued To-Date
- 89.78 % Issued To-Date
Cited Art Landscape
Patent Citation Ranking
- 1 Citation Count
- G01Q Class
- 0 % this patent is cited more than
- 8 Age
Maintenance Fees
| Fee | Large entity fee | small entity fee | micro entity fee | due date |
|---|---|---|---|---|
| 11.5 Year Payment | $7400.00 | $3700.00 | $1850.00 | Jul 24, 2028 |
