ESD clamp with auto biasing under high injection conditions

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United States of America Patent

PATENT NO 9543296
APP PUB NO 20140034996A1
SERIAL NO

14049888

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Abstract

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In a dual direction ESD protection circuit formed from multiple base-emitter fingers that include a SiGe base region, and a common sub-collector region, the I-V characteristics are adjusted by including P+ regions to define SCR structures that are operable to sink positive and negative ESD pulses, and adjusting the layout and distances between regions and the number of regions.

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Patent Owner(s)

Patent OwnerAddress
NATIONAL SEMICONDUCTOR CORPORATIONSANTA CLARA CA

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Vashchenko, Vladislav Palo Alto, US 158 1184

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