Nitride semiconductor substrate
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United States of America Patent
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Jan 3, 2017
Grant Date -
Oct 30, 2014
app pub date -
Apr 22, 2014
filing date -
Apr 25, 2013
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Abstract
A nitride semiconductor substrate is provided which is suitable for a high withstand voltage power device and prevents a warp and a crack from generating in a Si substrate when forming a thick nitride semiconductor layer on the substrate. A nitride semiconductor substrate 1 is prepared in such a manner that a buffer layer 3 and a semiconductor active layer 4 each comprising a group 13 nitride are stacked one by one on one principal plane of a Si single crystal substrate, the one principal plane has an offset angle of 0.1° to 1° or −1° to −0.1° with respect to a (111) plane, an average dopant concentration in a bulk is 1×1018 to 1×1021 cm−3, the Si single crystal substrate 2 has a SiO2 film on the back, and the total thickness of the buffer layer 3 and the semiconductor active layer 4 is 4 to 10 μm.
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