Semiconductor memory device
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United States of America Patent
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Nov 22, 2016
Grant Date -
Sep 17, 2015
app pub date -
Aug 29, 2014
filing date -
Mar 13, 2014
priority date (Note) -
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Abstract
According to one embodiment, a semiconductor memory device includes a memory cell array in which memory cells are disposed in a matrix, each memory cell being connectable to any one of a plurality of bit lines, and a capacitance that suppresses coupling noise among the plurality of bit lines, the capacitance being added to at least one of the plurality of bit lines.
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