Selective die electrical insulation by additive process

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United States of America Patent

PATENT NO 9490230
APP PUB NO 20160020188A1
SERIAL NO

14868090

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Abstract

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Additive processes are employed for electrically insulating selected surface regions on a stack of die; and methods for electrically interconnecting die in a stack of die, include additive processes for electrically insulating selected surface regions of the die. Regions that are not insulated according to the invention are available for electrical connection using electrically conductive material applied in flowable form to make electrically conductive traces.

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Patent Owner(s)

Patent OwnerAddress
INVENSAS CORPORATION3025 ORCHARD PARKWAY SAN JOSE CA 95134

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Leal, Jeffrey S Scotts Valley, US 13 349

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