Method and apparatus for an active negative-capacitor circuit to cancel the input capacitance of comparators
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United States of America Patent
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Nov 1, 2016
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app pub date -
Jan 14, 2016
filing date -
Sep 3, 2012
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Abstract
A negative-capacitance circuit comprises a first node coupled to a drain of a first transistor and a gate of a second transistor; a second node coupled to a drain of the second transistor and a gate of the first transistor; a capacitor coupled between a source of the first transistor and a source of the second transistor; a first current mirror coupled between a supply voltage and the source of the first transistor; and a second current mirror coupled between the supply voltage and the source of the second transistor. The circuit can be configured to drive the differential capacitive load between the first and second nodes in a shorter time period, thereby increasing the transfer bandwidth of the differential signal.
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