Non-volatile memory and manufacturing method thereof

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United States of America Patent

PATENT NO 9437715
APP PUB NO 20160240631A1
SERIAL NO

14697635

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Abstract

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A manufacturing method of a non-volatile memory is provided. A tunneling dielectric layer, a first conductive pattern, and isolation structures are formed on a substrate. Using a first photoresist layer as a mask, the first conductive pattern is partially removed to form a first opening exposing the substrate. An insulating layer is formed to fill the first opening and cover the first conductive pattern and the isolation structures. Using a second photoresist layer shielding a portion of the first conductive pattern as a mask, the insulating layer surrounding the first conductive pattern is removed to form a patterned insulating layer having a second opening exposing a portion of the first conductive pattern. An inter-gate dielectric layer and a second conductive pattern are formed on the first conductive pattern to fill the second opening, the first conductive pattern forms a floating gate, and the second conductive pattern forms a control gate.

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Patent Owner(s)

Patent OwnerAddress
POWERCHIP SEMICONDUCTOR MANUFACTURING CORPORATIONNO 18 LI-HSIN RD 1 HSINCHU SCIENCE PARK HSINCHU

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Chang, Ming-Feng Taichung, TW 11 44
Chung, Chih-Ping Hsinchu, US 24 51
Ho, Ming-Yu Taichung, TW 14 19
Liao, Hung-Kwei Taoyuan, TW 18 71

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