Architecture for vector memory array transposition using a block transposition accelerator

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United States of America Patent

PATENT NO 9436655
APP PUB NO 20160170936A1
SERIAL NO

15049255

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A system and method for vector memory array transposition. The system includes a vector memory, a block transposition accelerator, and an address controller. The vector memory stores a vector memory array. The block transposition accelerator reads a vector of a block of data within the vector memory array. The block transposition accelerator also writes a transposition of the vector of the block of data to the vector memory. The address controller determines a vector access order, and the block transposition accelerator accesses the vector of the block of data within the vector memory array according to the vector access order.

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Patent Owner(s)

Patent OwnerAddress
ST-ERICSSON SA39 CHEMIN DU CHAMP-DES-FILLES PLAN-LES-OUATES 1228

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Hu, Liangliang Shanghai, CN 29 105
Sun, Yanmeng Shanghai, CN 22 162

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