Register renaming system using multi-bank physical register mapping table and method thereof

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United States of America Patent

PATENT NO 9436472
APP PUB NO 20140122837A1
SERIAL NO

14064936

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Abstract

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Embodiments of a processor architecture utilizing multi-bank implementation of physical register mapping table are provided. A register renaming system to correlate architectural registers to physical registers includes a physical register mapping table and a renaming logic. The physical register mapping table has a plurality of entries each indicative of a state of a respective physical register. The mapping table has a plurality of non-overlapping sections each of which having respective entries of the mapping table. The renaming logic is coupled to search a number of the sections of the mapping table in parallel to identify entries that indicate the respective physical registers have a first state. The renaming logic selectively correlates each of a plurality of architectural registers to a respective physical register identified as being in the first state. Methods of utilizing the multi-bank implementation of physical register mapping table are also provided.

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Patent Owner(s)

Patent OwnerAddress
MICROELECTRONIC INNOVATIONS LLC717 N UNION STREET WILMINGTON DE 19805

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Sun, Hong-Xia Beijing, CN 8 106
Wu, Yong Qiang Beijing, CN 10 110
Zhu, Peng Fei Beijing, CN 10 110

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