Three dimensional device integration method and integrated device
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United States of America Patent
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Aug 30, 2016
Grant Date -
Jun 30, 2016
app pub date -
Mar 8, 2016
filing date -
Oct 1, 1999
priority date (Note) -
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Abstract
A method may include the steps of directly bonding a semiconductor device having a substrate to an element; and removing a portion of the substrate to expose a remaining portion of the semiconductor device after bonding. The element may include one of a substrate used for thermal spreading, impedance matching or for RF isolation, an antenna, and a matching network comprised of passive elements. A second thermal spreading substrate may be bonded to the remaining portion of the semiconductor device. Interconnections may be made through the first or second substrates. The method may also include bonding a plurality of semiconductor devices to an element, and the element may have recesses in which the semiconductor devices are disposed.
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