Memory protection
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
Aug 30, 2016
Grant Date -
Jan 2, 2014
app pub date -
Jun 21, 2013
filing date -
Jun 27, 2012
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
An integrated-circuit device (1) comprises a processor (7), memory (13) for storing executable code, and memory protection logic (9). The memory protection logic (9) is configured to: determine the state of a read protection flag for a protected region of the memory (13); detect a memory read request by the processor (7); determine whether the read request is for an address in the protected region of the memory (13); determine whether the processor (7) issued the read request while executing code stored in the protected region of the memory (13); and deny read requests for addresses in the protected region if the read protection flag for the protected region is set, unless at least one of one or more access conditions is met, wherein one of the access conditions is that the processor (7) issued the read requests while executing code stored in the protected region.
First Claim
Other Claims data not available
Family
International Classification(s)
- 2013 Application Filing Year
- G06F Class
- 48303 Applications Filed
- 43929 Patents Issued To-Date
- 90.95 % Issued To-Date
Cited Art Landscape
Patent Citation Ranking
- 7 Citation Count
- G06F Class
- 11.69 % this patent is cited more than
- 9 Age
Maintenance Fees
| Fee | Large entity fee | small entity fee | micro entity fee | due date |
|---|---|---|---|---|
| 11.5 Year Payment | $7400.00 | $3700.00 | $1850.00 | Feb 29, 2028 |
