Dynamic frequency memory control
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
Aug 9, 2016
Grant Date -
Jul 5, 2012
app pub date -
Aug 27, 2010
filing date -
Sep 9, 2009
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
A memory controller (40) is adaptable to scaling of a system clock frequency, to enable another device (10) to access a memory (20), and has a part for outputting control signals having some timing characteristics not entirely scalable with scaling of the system clock frequency. In response to an indication of a change in a frequency of the system clock, the memory controller adapts the part autonomously to enable it to output new digital memory control signals synchronized to the changed system clock and which also have the non scalable timing characteristics. This avoids the need for the processor to adapt the memory controller. Hence the adaptation can be carried out more quickly, leading to less disruption to other parts of the system and means the frequency scaling can be carried out more often.
First Claim
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully