Autoconfigurable phase-locked loop which automatically maintains a constant damping factor and adjusts the loop bandwidth to a constant ratio of the reference frequency
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United States of America Patent
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Jul 26, 2016
Grant Date -
Dec 20, 2012
app pub date -
Jun 16, 2012
filing date -
Jun 20, 2011
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Abstract
A phase-locked loop (PLL) includes a state machine programmed to automatically produce a set of control signals to select a charge-pump current and integrating capacitance value to automatically adjust a loop bandwidth of the PLL. A charge-pump DAC generates a charge-pump current of magnitude controlled by the state machine control signals. An integrator integrates the charge-pump output current to produce an integrated charge-pump output signal. The integrator has a plurality of capacitors switchably selected by control signals from the state machine to produce an integrating capacitance value. A voltage controlled oscillator (VCO) produces a PLL output frequency in response to the integrated charge-pump output signal.
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