Capacitance bank systems and methods

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United States of America Patent

PATENT NO 9390861
APP PUB NO 20140210278A1
SERIAL NO

13752624

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Abstract

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A capacitance bank system includes a plurality of voltage controlled capacitance cells and an output node. The plurality of capacitance cells have an anti-parallel configuration. The plurality of capacitance cells are configured to selectively provide cell capacitances. The output node is coupled to the plurality of capacitance cells. The output node is configured to provide an input capacitance step smaller than a minimum physical capacitor supported by a particular technology.

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Patent Owner(s)

Patent OwnerAddress
INTEL CORPORATION2200 MISSION COLLEGE BOULEVARD SANTA CLARA CA 95054

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Gaied, David Cairo, EG 2 3
Mohieldin, Ahmed Nader Giza, EG 2 21

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