Buffer circuit
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United States of America Patent
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Jun 21, 2016
Grant Date -
Dec 10, 2015
app pub date -
Aug 11, 2014
filing date -
Jun 9, 2014
priority date (Note) -
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Abstract
The present disclosure provides a buffer circuit comprising a plurality of operational amplifiers and a switch module. Each operational amplifier forms a buffer. The operational amplifier has an output stage. The stage has a first transistor and a second transistor. The first transistor and the second transistor are connected to an output terminal. The first transistor has a first control terminal. The second transistor has a second control terminal. The switch module is connected to the first control terminal of the first transistor and the second control terminal of the second transistor. The switch module connects together at least two of the first terminals of the first transistor according to a control signal. The switch module connects together at least two of the second terminals of the second transistor according to the control signal.
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