Semiconductor chip with seal ring and sacrificial corner pattern
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United States of America Patent
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Jun 14, 2016
Grant Date -
Apr 23, 2015
app pub date -
Dec 23, 2014
filing date -
Sep 10, 2004
priority date (Note) -
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Abstract
A semiconductor device including a low dielectric constant film of which the relative dielectric constant is less than 3.5, is provided with one or more seal rings that are moisture blocking walls forming a closed loop in a plan view, and where at least one of the seal rings includes a seal ring protrusion portion in inward protruding form in the vicinity of a chip corner.
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