Volatile/non-volatile memory cell
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United States of America Patent
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Jun 14, 2016
Grant Date -
Mar 13, 2014
app pub date -
Jan 19, 2012
filing date -
Jan 19, 2011
priority date (Note) -
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Abstract
The invention concerns a memory device comprising at least one memory cell comprising: a first transistor (102) coupled between a first storage node (106) and a first resistance switching element (202) programmed to have a first resistance; and a second transistor (104) coupled between a second storage node (108) and a second resistance switching element (204) programmed to have a second resistance, a control terminal of said first transistor being coupled to said second storage node, and a control terminal of said second transistor being coupled to said first storage node; and control circuitry (602) adapted to store a data value (DNV) at said first and second storage nodes by coupling said first and second storage nodes to a first supply voltage (VDD, GND), the data value being determined by the relative resistances of the first and second resistance switching elements.
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