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United States of America Patent

PATENT NO 9362943
APP PUB NO 20150236713A1
SERIAL NO

14695385

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Abstract

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Provided is a data converter which is provided with a clock signal input part which inputs a clock signal, and an input part which inputs an input signal, a sampling part which, in response to the clock signal input to the clock signal input part, performs sampling of the input signal input to the input part, and a signal processing part which performs signal processing according to the sampling cycle and outputs an output signal, wherein when the cycle of the clock signal input to the clock signal input part becomes longer, the output signals output by the signal processing part are reduced.

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Patent Owner(s)

Patent OwnerAddress
TRIGENCE SEMICONDUCTOR INC4-6-13-404 KUDANMINAMI CHIYODA-KU TOKYO 1020074

International Classification(s)

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Okamura, Jun-ichi Tokyo, JP 31 437
Yasuda, Akira Tokyo, JP 100 1987

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