Semiconductor device
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United States of America Patent
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Jun 7, 2016
Grant Date -
Aug 13, 2015
app pub date -
Apr 20, 2015
filing date -
Dec 19, 2011
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Abstract
A semiconductor device includes first and second fin-shaped silicon layers on a substrate, each corresponding to the dimensions of a sidewall pattern around a dummy pattern. First and second pillar-shaped silicon layers reside on the first and second fin-shaped silicon layers, respectively. An n-type diffusion layer resides in an upper portion of the first fin-shaped silicon layer and in upper and lower portions of the first pillar-shaped silicon layer. A p-type diffusion layer resides in an upper portion of the second fin-shaped silicon layer and upper and lower portions of the second pillar-shaped silicon layer. First and second gate insulating films and metal gate electrodes are around the first and second pillar-shaped silicon layers, respectively. A metal gate line is connected to the first and second metal gate electrodes and extends in a direction perpendicular to the first and second fin-shaped silicon layers.
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