Gate structures for transistor devices for CMOS applications and products
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United States of America Patent
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Jun 7, 2016
Grant Date -
Oct 29, 2015
app pub date -
Jul 7, 2015
filing date -
Sep 4, 2013
priority date (Note) -
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Abstract
An integrated circuit product includes an NMOS transistor having a gate structure that includes an NMOS gate insulation layer, a first NMOS metal layer positioned on the NMOS gate insulation layer, an NMOS metal silicide material positioned above the first NMOS metal layer, and a layer of a second metal material positioned above and in contact with the NMOS gate insulation layer, the first NMOS metal layer, and the NMOS metal silicide layer. The PMOS transistor has a gate structure that includes a PMOS gate insulation layer, a first PMOS metal layer positioned on the PMOS gate insulation layer, a PMOS metal silicide material positioned above the first PMOS metal layer, and a layer of the second metal material positioned above and in contact with the PMOS gate insulation layer, the first PMOS metal layer, and the PMOS metal silicide layer.
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