Method of producing a junction field-effect transistor (JFET)

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United States of America Patent

PATENT NO 9356113
APP PUB NO 20150349084A1
SERIAL NO

14426041

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Abstract

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The invention concerns a method for producing a field effect transistor having a trench gate comprising: —the forming (110) of at least one trench (11, 12, 13) in a semi-conductive substrate (1) having a first type of conductivity, said substrate comprising two opposing faces called front face and rear face, —the primary implantation (120) of ions having a second type of conductivity so as to implant each trench of the substrate to form an active gate area, —the depositing (160) of a layer of polycrystalline silicon having the second type of conductivity on the implanted active gate area, —the oxidation (160) of the layer of polycrystalline silicon, and —the metallization (180) of the substrate on the front and rear faces of same in order to form active source and drain areas.

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Patent Owner(s)

Patent OwnerAddress
CONSEJO SUPERIOR DE INVESTIGACIONES CIENTIFICAS (CSIC)C/SERRANO 117 MADRID 28006
CENTRE NATIONAL DE LA RECHERCHE SCIENTIFIQUE (CNRS)3 RUE MICHEL ANGE PARIS 75016
ECOLE CENTRALE DE LYON36 AVENUE GUY DE COLLONGUE - B P 163 ECULLY CEDEX 69134
UNIVERSITE CLAUDE BERNARD LYON 143 BOULEVARD DU ONZE NOVEMBRE 1918 VILLEURBANNE 69100
INSTITUT NATIONAL DES SCIENCES APPLIQUEES DE LYON20 AVENUE ALBERT EINSTEIN VILLEURBANNE CEDEX 69621

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Chevalier, Florian Saint Etienne, FR 2 0
Godignon, Philippe Barcelona, ES 10 32
Millan, José Barcelona, ES 1 0
Tournier, Dominique Lyons, FR 7 16

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