Coreless layer buildup structure with LGA and joining layer

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United States of America Patent

PATENT NO 9351408
APP PUB NO 20120031649A1
SERIAL NO

12764997

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Abstract

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A substrate for use in a PCB or PWB board having a coreless buildup layer and at least one metal and at least one dielectric layer. The coreless buildup dielectric layers can consist of at least partially cured thermoset resin and thermoplastic resin. The substrate may also contain land grid array (LGA) packaging.

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Patent Owner(s)

Patent OwnerAddress
TTM TECHNOLOGIES NORTH AMERICA LLC520 MARYVILLE CENTRE DRIVE SUIT 400 ST LOUIS MO 63141

International Classification(s)

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Antesberger, Timothy Vestal, US 10 76
Das, Rabindra N Vestal, US 53 1420
Egitto, Frank D Binghamton, US 86 1287
Markovich, Voya Endwell, US 29 784
Wilson, William Waverly, US 45 482

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