Memory cores of resistive type memory devices, resistive type memory devices and method of sensing data in the same
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United States of America Patent
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May 3, 2016
Grant Date -
Dec 17, 2015
app pub date -
Apr 3, 2015
filing date -
Jun 16, 2014
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Abstract
A memory core of a resistive type memory device includes at least a first resistive type memory cell coupled to a bit-line, a first resistance to voltage converter and a bit-line sense amplifier. The first resistance to voltage converter is coupled to the bit-line at a first node. The first resistance to voltage converter converts a resistance of the first resistive type memory cell to a corresponding voltage based on a read column selection signal. The bit-line sense amplifier is coupled to the bit-line at the first node and is coupled to a complementary bit-line at a second node. The bit-line sense amplifier senses and amplifies a voltage difference of the bit-line and the complementary bit-line in response to a sensing control signal.
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