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• 15 United States
• 10 France
• 8 Japan
• 7 China
• 5 Korea
• 2 Other

Patent Owner(s)

Patent Owner	Address
CLARIANT INTERNATIONAL AG	ROTHAUSSTRASSE 61 MUTTENZ CH-4132

International Classification(s)

• C07C:ACYCLIC OR CARBOCYCLIC COMPOUNDS
• B01J:CHEMICAL OR PHYSICAL PROCESSES, e.g. CATALYSIS, CO....

Inventor(s)

Inventor Name	Address	# of filed Patents	Total Citations
Fischer, Richard	Bad Aibling, DE	37	237
# of filed Patents : 37 Total Citations : 237
Kaiser, Melanie	Grosskarolinenfeld, DE	2	3
# of filed Patents : 2 Total Citations : 3
Szesni, Normen	Rosenheim, DE	6	21
# of filed Patents : 6 Total Citations : 21
Wölk, Hans-Jörg	Rosenheim, DE	12	44
# of filed Patents : 12 Total Citations : 44

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• 0 Citation Count
• C07C Class

• 0 % this patent is cited more than
• 9 Age

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Maintenance Fees

Fee	Large entity fee	small entity fee	micro entity fee	due date
11.5 Year Payment	$7400.00	$3700.00	$1850.00	Nov 3, 2027

Fee	Large entity fee	small entity fee	micro entity fee
Surcharge - 11.5 year - Late payment within 6 months	$160.00	$80.00	$40.00
Surcharge after expiration - Late payment is unavoidable	$700.00	$350.00	$175.00
Surcharge after expiration - Late payment is unintentional	$1,640.00	$820.00	$410.00

DATE PUBLISHED	PUBLICATION/PATENT NO.	PUBLICATION TYPE
May 03, 2016	US,9327272,B2   US9327272B2	GRANTED PATENT AS SECOND PUBLICATION
February 14, 2013	US,20130041193,A1   US20130041193A1	FIRST PUBLISHED PATENT APPLICATION

Full Text

US Patent No: 8018030

Semiconductor chip with seal ring and sacrificial corner pattern

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Abstract

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A semiconductor device according to the invention is a semiconductor device which includes a low dielectric constant film of which the relative dielectric constant is less than 3.5, is provided with one or more seal rings that are moisture blocking walls in closed loop form in a plan view, and where at least one of the seal rings includes a seal ring protrusion portion in inward protruding form in the vicinity of a chip corner.

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Description

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Claims

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Claims data not available

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Legal Events

 

• AS2020
• AS2020
• AS�2020
• LAPS2019
• STCH2019
• FP2019
• FEPP2019
• FPAY2015
• AS2015
• FEPP2012
• I2011
• STCF2011
• AS2010
• P2009
• F2009
• PD2004

Date	Code	Event	Description
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Oct 21, 2019	LAPS	LAPSE FOR FAILURE TO PAY MAINTENANCE FEES	free format text: PATENT EXPIRED FOR FAILURE TO PAY MAINTENANCE FEES (ORIGINAL EVENT CODE: EXP.); ENTITY STATUS OF PATENT OWNER: LARGE ENTITY
Oct 21, 2019	STCH	INFORMATION ON STATUS: PATENT DISCONTINUATION	free format text: PATENT EXPIRED DUE TO NONPAYMENT OF MAINTENANCE FEES UNDER 37 CFR 1.362
Sep 13, 2019	FP	LAPSED DUE TO FAILURE TO PAY MAINTENANCE FEE	Effective Date: Sep 13, 2019
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Feb 25, 2015	FPAY	FEE PAYMENT	year of fee payment: 4
Jan 27, 2015	AS	ASSIGNMENT	free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:RENESAS ELECTRONICS CORPORATION;REEL/FRAME:038425/0710 Owner name: ACACIA RESEARCH GROUP LLC, TEXAS Effective Date: Jan 27, 2015
Dec 05, 2012	FEPP	FEE PAYMENT PROCEDURE	free format text: PAYOR NUMBER ASSIGNED (ORIGINAL EVENT CODE: ASPN); ENTITY STATUS OF PATENT OWNER: LARGE ENTITY
Sep 13, 2011	I	Issuance
Aug 24, 2011	STCF	INFORMATION ON STATUS: PATENT GRANT	free format text: PATENTED CASE
Apr 01, 2010	AS	ASSIGNMENT	free format text: CHANGE OF NAME;ASSIGNOR:NEC ELECTRONICS CORPORATION;REEL/FRAME:024906/0667 Owner name: RENESAS ELECTRONICS CORPORATION, JAPAN Effective Date: Apr 01, 2010 free format text: MERGER;ASSIGNOR:RENESAS TECHNOLOGY CORP.;REEL/FRAME:024906/0631 Owner name: NEC ELECTRONICS CORPORATION, JAPAN Effective Date: Apr 01, 2010
Jul 30, 2009	P	Published
Mar 24, 2009	F	Filing
Sep 10, 2004	PD	Priority Date