Noise shaped interpolator and decimator apparatus and method
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
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Apr 26, 2016
Grant Date -
Nov 26, 2015
app pub date -
Aug 4, 2015
filing date -
Aug 5, 2003
priority date (Note) -
In Force
status (Latency Note)
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Abstract
An interpolator or decimator includes an elastic storage element in the signal path between first and second clock domains. The elastic element may, for example, be a FIFO which advantageously allows short term variation in sample clocks to be absorbed. A feedback mechanism controls a delta-sigma modulated modulo-N counter based sample clock generator. The elastic element combined with a delta-sigma modulator and counter creates a noise-shaped frequency lock loop without additional components, resulting in a much simplified interpolator and decimator.
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- 15 United States
- 10 France
- 8 Japan
- 7 China
- 5 Korea
- 2 Other
Patent Owner(s)
Patent Owner | Address | |
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STMICROELECTRONICS N V | 1118 BH SCHIPHOL AIRPORT AMSTERDAM |
International Classification(s)

- 2015 Application Filing Year
- H04L Class
- 33706 Applications Filed
- 25909 Patents Issued To-Date
- 76.87 % Issued To-Date
Inventor(s)
Inventor Name | Address | # of filed Patents | Total Citations |
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Norsworthy, Steven R | Cardiff, US | 27 | 813 |
# of filed Patents : 27 Total Citations : 813 | |||
Redgrave, Jason Rupert | Mountain View, US | 72 | 627 |
# of filed Patents : 72 Total Citations : 627 |
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- H04L Class
- 0 % this patent is cited more than
- 9 Age
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11.5 Year Payment | $7400.00 | $3700.00 | $1850.00 | Oct 26, 2027 |
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Apr 26, 2016 | I | Issuance | |
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Nov 26, 2015 | P | Published | |
Aug 04, 2015 | F | Filing |

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