Semiconductor device including a stress buffer material formed above a low-k metallization system
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
Apr 26, 2016
Grant Date -
Sep 12, 2013
app pub date -
Apr 25, 2013
filing date -
Jul 31, 2009
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
A bump structure or pillar structure formed above a metallization system of a complex semiconductor device may include a stress buffer layer, which may efficiently distribute the resulting mechanical stress which may typically occur during the chip package interaction due to a thermal mismatch of these components. The stress buffer layer comprises copper-based buffer regions that cover a significant portion of the overall surface, wherein a thickness of approximately 3-10 μm may also be used. Moreover, the buffer regions may efficiently replace aluminum as a terminal metal active region.
First Claim
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully