Bit-flipping memory controller to prevent SRAM data remanence

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United States of America Patent

PATENT NO 9324072
SERIAL NO

12229574

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Abstract

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A memory is organized into blocks. In a bit-flipping operation, a memory block is read, the read bit data values are inverted, and the inverted data is written back to the memory block. Inverted memory blocks are tracked by setting a flag bit in the memory block, or by storing a pointer to a memory block. In a read operation, a memory block is read and, if the tracking method indicates the memory block is inverted, the read data values are reverted before being returned. In a write operation, a memory block is read and, if the tracking method indicates the memory block is inverted, the write data values are inverted before being written. Inversion of data values and tracking of inverted memory blocks may be performed by a specialized memory controller or by a processor executing secure memory code. Data remanence is thus prevented in the memory.

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Patent Owner(s)

Patent OwnerAddress
IXYS INTL LIMITED103 SOUTH CHURCH STREET HARBOUR PLACE 4TH FL PO BOX 1034 GRAND CAYMAN KY1-1102

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Lloyd, Russell B Middleton, US 5 6
Nekl, Joshua J Kuna, US 14 99
Roberts, David A Meridian, US 246 4199

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