Integrated circuit failure prediction using clock duty cycle recording and analysis
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United States of America Patent
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Apr 19, 2016
Grant Date -
Jun 18, 2015
app pub date -
Dec 12, 2013
filing date -
Dec 12, 2013
priority date (Note) -
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Abstract
A system is disclosed, which may include a clock distribution circuit. The clock distribution circuit may include a duty cycle controller to distribute a clock output signal to a plurality of remote locations on a clock grid. The duty cycle controller may adjust, in response to a duty cycle control signal, a duty cycle of the clock output signal. The clock distribution circuit may also include a duty cycle measurement unit, to measure the duty cycle of the clock output signal at one of the remote locations, generate the duty cycle control signal, and generate and write duty cycle data values to a memory unit. The system may also include control logic to calculate and transmit a clock distribution circuit end-of-life date, by applying a model to stored duty cycle data values and to a duty cycle controller adjustment state.
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