Electrical transceiver for synchronous Ethernet
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
Apr 12, 2016
Issued Date -
N/A
app pub date -
Oct 17, 2014
filing date -
Oct 18, 2013
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
Disclosed is an electrical transceiver for synchronous Ethernet, including: a first interface connected with a host; a second interface including a physical layer (PHY) transceiver connected with a serial link; and a processor connected with the first interface and the second interface, wherein the processor includes a timing control unit controlling a transmission signal transmitted to the second interface from the first interface and a reception signal transmitted to the first interface from the second interface to have the same time delay.
First Claim
Family
International Classification(s)
- [Classification Symbol]
- [Patents Count]
Cited Art Landscape
Patent Citation Ranking
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully