Asymmetric log-likelihood ratio for flash channel
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United States of America Patent
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Apr 5, 2016
Issued Date -
N/A
app pub date -
May 28, 2015
filing date -
Oct 5, 2010
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Abstract
Disclosed is a system and method for reading flash memory cells with dynamically adjusted probability values (e.g., log-likelihood ratios). In connection with reading bit values from flash memory cells, one or more predetermined first probability values are adjusted relative to one or more predetermined second probability values. The one or more predetermined first probability values are associated with reading one or more memory cells programmed to a first binary value, and the one or more predetermined second probability values are associated with reading one or more memory cells programmed to a second binary value. The plurality of bit values read from the plurality of non-volatile memory cells and the one or more adjusted first probability values are provided to a decoder for use in decoding the plurality of bit values.
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- 15 United States
- 10 France
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Patent Owner(s)
Patent Owner | Address | |
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WESTERN DIGITAL TECHNOLOGIES INC | 20511 LAKE FOREST DRIVE LAKE FOREST CA 92630 |
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Inventor(s)
Inventor Name | Address | # of filed Patents | Total Citations |
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Hu, Xinde | San Jose, US | 58 | 950 |
# of filed Patents : 58 Total Citations : 950 |
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