Method for compensating timing errors of real-time clocks
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United States of America Patent
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Apr 5, 2016
Grant Date -
May 7, 2015
app pub date -
May 30, 2014
filing date -
Nov 4, 2013
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Abstract
The present invention relates to a method for compensating timing errors of real-time clocks, which comprises a compensating step, wherein in step 1, assign CNT to be 0 and execute step two; in step 2, assign FLAG to be 1 when a rising edge of 1 Hz clock is arrived and execute step 3; in step 3, judge FLAG and M3, if FLAG=1 and M3<0, execute step 4 while waiting until CNT=S4; if FLAG=1, CNT=0 and M3>0, execute step 5; otherwise execute step 2; in step 4, execute an assignment operation, CNT=0, M3=M3+S4, FLAG=0 and restart step 2; in step 5, execute an assignment operation, CNT=S4, M3=M3−S4, FLAG=0, and restart step 2. A sampling frequency of relative errors ERR of the present invention is adjustable, and a compensatory accuracy is much higher.
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