LDMOS with no reverse recovery

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United States of America Patent

PATENT NO 9293577
APP PUB NO 20110241108A1
SERIAL NO

12750568

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Importance

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Abstract

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A transistor includes a source region including a first impurity region implanted into a substrate, a drain region including a second impurity region implanted into the substrate, and a gate including an oxide layer formed over the substrate and a conductive material formed over the oxide layer, the oxide layer comprising a first side and a second side, the first side formed over a portion of the first impurity region and the second side formed over a portion of the second impurity region, the first side having a thickness of less than about 100 Å, and the second side having a thickness equal to or greater than 125 Å.

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Patent Owner(s)

Patent OwnerAddress
VOLTERRA SEMICONDUCTOR CORPORATION47467 FREMONT BOULEVARD FREMONT CA 94538

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Zuniga, Marco A Palo Alto, US 83 1809

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