Semiconductor package having a baseplate with a die attach region and a peripheral region
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United States of America Patent
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Mar 22, 2016
Grant Date -
Feb 19, 2015
app pub date -
Nov 3, 2014
filing date -
Mar 28, 2012
priority date (Note) -
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Abstract
A semiconductor package includes a baseplate having a die attach region and a peripheral region, a transistor die having a first terminal and a second terminal facing away from the baseplate, and a frame including an electrically insulative member having a first side attached to the peripheral region of the baseplate, a second side facing away from the baseplate, a first metallization at the first side of the insulative member and a second metallization at the second side of the insulative member. The insulative member extends outward beyond a lateral sidewall of the baseplate. The first metallization is attached to the part of the first side which extends outward beyond the lateral sidewall of the baseplate. The first and second metallizations are electrically connected at a region of the insulative member spaced apart from the lateral sidewall of the baseplate.
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