Performance, thermal and power management system associated with an integrated circuit and related method

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United States of America Patent

PATENT NO 9292027
APP PUB NO 20150025829A1
SERIAL NO

14507856

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Abstract

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The performance, thermal and power management system is configured to perform DVFS calibration, temperature compensation adjustment, aging calibration, and DC offset calibration in an IC. The initial voltage supplied to the IC maybe set to an initial value which takes chip-to-chip process variations into account and then dynamically adjusted according to temperature variations, DC offset and/or aging effects. Therefore, the performance, thermal and power management system may achieve optimized thermal and power performance of the IC.

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Patent Owner(s)

Patent OwnerAddress
MEDIATEK SINGAPORE PTE LTDNO 1 FUSIONOPOLIS WALK #03-01 SOLARIS SINGAPORE

International Classification(s)

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Gammie, Gordon Plano, US 21 610
Ko, Uming Houston, US 47 1321
Wang, Alice Allen, US 43 915

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